Fa'amatalaga
![mata COF](https://ecdn6.globalso.com/upload/p/1355/source/2024-03/65f963535392056530.jpg)
T5L0 ASIC | T5L0 ASIC ose eletise maualalo, taugofie, GUI ma le faʻaoga sili ona tuʻufaʻatasia tasi chip dual-core ASIC fuafuaina e DWIN Technology mo laʻititi laʻititi LCD ma masini gaosia i le 2020. |
Lanu | 262K lanu | ||
Ituaiga LCD | TN, TFT LCD | ||
Matamataga Angle | Matamata TV, taua masani o le 70°/70°/40°/30°(L/R/U/D) | ||
Vaega Fa'aali(AA) | 154.08mm (W)×85.92mm (H) | ||
I'ugafono | 800*480 | ||
Molī tua | LED | ||
Malamalama |
DMG80480F070_06WN:250nit DMG80480F070_06WTR:150nit DMG80480F070_06WTC:200nit |
Malosiaga Malosi | 4.5~5.5V | ||
Galuega Fa'atino | 440mA VCC=5V, maualuga moli tua | ||
120mA VCC=5V, tape moli tua |
Galulue Vevela | -10℃~60℃(5V @ 60% RH) | ||
Teuga vevela | -20℃~70℃ | ||
Susū Galuega | 10% ~ 90% RH, taua masani o 60% RH |
Fa'aoga fa'aoga | 10Pin_1.0mm FPC | ||
Fa'amatalaga Fa'amaumauga | N81 | ||
Malosi o Galuega (TXD) | Fuafuaga 1;3.0~3.3 V | ||
0;0~0.3 V | |||
Voltage Ulufale (RXD) | Ulufale 1; 3.3V | ||
Ulufale 0; 0~0.5V | |||
Fa'afeso'ota'i |
UART1: TTL; UART2: TTL; |
Pin | Uiga | Ituaiga | Fa'amatalaga Fa'atino |
1 | +5V | P | Malosiaga, DC4.5-5.5V |
2 | +5V | ||
3 | DIN2 | I | UART2 Ulufale |
4 | DOUT2 | O | UART2 Galuega Fa'atino |
5 | DIN1 | I | UART1 Ulufale |
6 | DOUT1 | O | UART1 Galuega Fa'atino |
7 | SPK | O | MOSFET i fafo e fa'aoso ai le fa'aulu po'o le sipika |
8 | TOE FAI | - | TOE FAI |
9 | GND | P | GND |
10 | GND |