DWIN est T5L Smart Screen Hot-venditionis Promotio
F-series COF dolor LCMs massa-producta mox erit
4.0-inch COF screen
5.0-inch COF screen
7.0 inch COF screen
Primum massa-productum exempla
Exemplar | 'collaborative text Size' (inch) | Resolution (pixel) | Reference price (13% VAT inclusa) | Dicta | ||
WN | WTR | WTC | ||||
DMG32240F028_01W | 2.8 | 320*240 | 45 | 50 | \ | Lata viewing angulus |
DMG48320F035_01W | 3.5 | 480*320 | 70 | \ | 95 | IPS. Alternativa species est alba vel nigra integra. Plene laminati TP ad WTC tegumentum integrandum nigrum. |
DMG48480F040_01W | 4.0 | 480*480 | 68 | \ | 98 | IPS. Alternativa species est alba vel nigra integra. Plene laminati TP ad WTC tegumentum integrandum nigrum. |
DMG48270F043_01W | 4.3 | 480* 272 | 59 | 65 | \ | Normalis viewing angulus |
DMG80480F043_01W | 4.3 | 480*800 | 68 | \ | 95 | IPS. Alternativa species est alba vel nigra integra. Plene laminati TP ad WTC tegumentum integrandum nigrum. |
DMG85480F050_01W | 5.0 | 480*854 | 76 | \ | 110 | IPS. Alternativa species est alba vel nigra integra. Plene laminati TP ad WTC tegumentum integrandum nigrum. |
DMG80480F070_01W | 7.0 | 800*480 | 95 | 105 | \ | Normalis viewing angulus |
F-series tegumenta uti 50Pin 0,5mm pix FPC interfaciei ad latus utentis unitum.
Definitio instrumenti talis est.
Pin | Definition | I/O* | Descriptio |
1 | +5V | ego | Potentia copia input, DC3.6-5.5V. |
2 | +5V | ego | |
3 | GND | GND | GND |
4 | GND | GND | |
5 | GND | GND | |
6 | AD7 | ego |
5 input ADCs. 12- bis senatus. 0-3.3V input intentione. Unius canalis notitia rate sampling est 16KHz et notitia AD1, AD3, AD5 et AD7 ad nucleum reale per UART3. 4 canales adhiberi possunt in parallelis ad augendam ratem sampling ad 64KSPS. 64SPS 16bit AD valores oversampling effici possunt. |
7 | AD6 | ego | |
8 | AD5 | ego | |
9 | AD3 | ego | |
10 | AD1 | ego | |
11 | +3.3 | O* | 3.3V output, maximum pondus 150mA. |
12 | SPK | O* | EXTERNUS BOMBINATOR or dicentis. |
13 | SD_CD | IO | SD/SDHC interface. |
14 | SD_CK | O* | |
15 | SD_D3 | IO | |
16 | SD_D2 | IO | |
17 | SD_D1 | IO | |
18 | SD_D0 | IO | |
19 | PWM0 | O* |
II 16 bis PWM output. Core OS in tempore reali per UART3 cum minima renovatione tempore 32μs coerceri potest. |
20 | PWM1 | O* | |
viginti unum | P3.3 | IO | |
vigintiduo | P3.2 | IO | |
viginti tres | P3.1/EX1 | IO | Adhiberi potest ut externum 1 input simul interrumpat, et sustinet utrumque planum intentione humili vel ore trahens modos interrumpendos. |
XXIV | P3.0/EX0 | IO | Adhiberi potest ut externum 0 input simul interrumpat, et sustinet utrumque planum voltage, vel ore trahens modos interrumpendos. |
25 | P2.7 | IO | |
26 | P2.6 | IO | |
27 | P2.5 | IO | |
28 | P2.4 | IO | |
29 | P2.3 | IO | |
30 | P2.2 | IO | |
31 | P2.1 | IO | |
32 | P2.0 | IO | |
33 | P1.7 | IO | |
34 | P1.6 | IO | |
35 | P1.5 | IO | |
36 | P1.4 | IO | |
37 | P1.3 | IO | |
38 | P1.2 | IO | |
39 | P1.1 | IO | |
40 | P1.0 | IO | |
41 | UART4_TXD | O* | UART4 |
42 | UART4_RXD | ego | |
43 | UART5_TXD | O* | UART5 |
44 | UART5_RXD | ego | |
45 | P0.0 | IO | |
46 | P0.1 | IO | |
47 | CAN_TX | O* | CAN |
48 | CAN_RX | ego | |
49 | UART2_TXD | O* | UART2 |
50 | UART2_RXD | ego |
DWIN High-Quality HDMI Interface Display SOLUTIO Dimittitur
commoda DWIN solution
Post tempus: Nov-12-2021