Specification
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T5L0-Q88 ASIC | T5L0-Q88 ASIC parva sarcina, humilitas potentiae, sumptus efficens, GUI et applicationes valde integrales-chipdual-core ASIC designatae a DWIN Technologia pro parva magnitudine LCD et massa anno 2023 producta. |
Color | 262K colorum | ||
LCD Type | IPS, TFT LCD | ||
Viewing Anglus | Lata visens angelum, valorem typicum 85°/85°/85°/85°(L/R/U/D) | ||
Propono Area(AA) | 71.86mm (W) × 70.18mm (H) | ||
Resolution | 480×480 | ||
Backlight | LED | ||
splendor | DMG48480F040_02WTCZ02:50nit |
Potentia Voltage | 4.5~5.5V | ||
Operatio Current | 280mA VCC=5V, max backlight | ||
100mA VCC=5V, backlight off |
Operatio Temperature | -10℃~60℃ | ||
Repono Temperature | -20℃~70℃ | ||
opus Umor | 10%~ 90% RH, valorem typicum 60% RH |
User Interface | 24Pin_0.5mm FPC | ||
Baud rate | 3150~3225600bps | ||
Output intentione | Output 1:3.0~3.3 V | ||
Output 0, 0~0.3 V | |||
Input intentione | Input 1;3.3V | ||
Input 0;0~0.5V | |||
Interface |
UART2: TTL; UART3: TTL, ( tantum available post OS configuratione UART4: TTL, ( tantum available post OS configuratione. | ||
Data Forma |
UART2: N81; UART3: N81/E81/O81/N82;4 modi (OS configuration) UART4: N81/E81/O81/N82;4 modi (OS configuration) |
PIN | Definition | Type | Eget Description |
1 | CAN_TX | O* | CAN interface (Can interface (Can chip externus coegi requiritur. Vide 5 in circuitu referat) ) |
2 | CAN_RX | ego | |
3 | TX3 | O* | UART3Output |
4 | RX3 | ego | UART3Input |
5 | TX2 | O* | UART2 output |
6 | RX2 | ego | UART2 Input |
7 | TR4 | - | - |
8 | TX4 | O* | UART4 Output |
9 | RX4 | ego | UART4 Input |
10 | TX1 | O* | UART1 Output |
11 | RX1 | ego | UART1 Input |
12 | ADC0 | ego | ADC input . 12-bit resolutio in casu 3.3V potestatis copia. 0-3.3V input intentione. Exceptis AD6, reliqua notitia ad Core OS per UART3 mittitur tempore reali cum 16KHz sampling rate. |
13 | ADC1 | ego | |
14 | NTC1 | ego | NTCin centro PCB |
15 | NTC2 | ego | NTC de clausura |
16 | PWM3 | O* | Buzzer / speaker exactoris. Resistor externus 10K ad terram detrahi debet ut potestas in gradu inferiori sit.Core OS in tempore reali per UART3 gubernari potest. |
17 | GND | P | GND |
18 | GND | P | |
19 | +5V | P | Virtutis copia, DC4.5-5.5V. |
20 | +5V | P | |
viginti unum | I2C_SDA | IO | RTC/proximitas sensoris/humiditatis sensoris multiplicatio. |
vigintiduo | I2C_SCL | IO | |
viginti tres | EX1 | IO | Interrumpere externi (INT1) |
XXIV | EX0 | IO | Externi adjicias (INT0) |